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    Projects > ELECTRICAL > 2017 > IEEE > POWER ELECTRONICS

    An Overlap-Time Compensation Method for Current-Source Space-Vector PWM Inverters


    Abstract

    In voltage-source inverters (VSI), it is necessary to add the dead-time between gating signals of the upper and lower switches to prevent short circuit in a phase leg. But in current source inverters (CSI), due to the large series inductor in DC-link, it is necessary to add overlap-time in gating signals of switches during commutation process for avoiding voltage spikes generated by the intermittent DC current. However, the overlap-time will cause negative influence in output current waveform. In this paper, the current commutation process of CSI within a carrier period is investigated, which shows that the overlap-time can cause output current- vector errors. The output-current-vector errors are then analyzed, which are equivalent to a superposition and introducing additional low-order harmonics in output current waveform. The relationship between harmonic distortion and the overlap-time is derived. An overlap-time compensation method is then proposed, which compensates the dwell time of vectors according to the relations of voltages at AC side of the inverter. The proposed overlap time compensation method can effectively decrease the current harmonics introduced by overlap-time and improve the output current of the inverter.


    Existing System

    Active Damping Method


    Proposed System

    In this paper, the overlap-time effect in the current-source space vector PWM inverter is analyzed in detail. Fourier analysis is applied to the current deviation introduced by overlap time. The relationship between harmonic distortion and overlap- time is numerically derived. Based on the space-vector modulation (SVM) strategy with double-triangular-synthesis mode, this paper will analyze the mechanism and influence of the overlap-time in detail, and then propose an overlap-time compensation method based on the dwell time of vectors. This method can adjust the dwell time of current-space-vector according to the magnitude of sampled three-phase voltages at the AC side of the inverter, and achieve effective compensation without additional switching devices.


    Architecture


    Block diagram of three-phase CSI system


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