Fault Prognosis for Power Electronics Systems Using Adaptive Parameter Identification

Abstract

This paper presents the design, implementation, and experimental validation of a method for fault prognosis for power electronics systems using an adaptive parameter identification approach. The adaptive parameter identifier uses a generalized gradient descent algorithm to compute real-time estimates of system parameters (e.g. capacitance, inductance, parasitic resistance) in arbitrary switching power electronics systems. These estimates can be used to monitor the overall health of a power electronics system, and predict when faults are more likely to occur. Moreover, the estimates can be used to tune control loops that rely on the system parameter values. The parameter identification algorithm is general in that it can be applied to a broad class of systems based on switching power converters.

Existing System

Artificial Neural Networks.

Proposed System

In this paper, we present a technique for fault prognosis for power electronics systems using an adaptive parameter identifier approach. The fundamental algorithm uses a switched linear model of a switching power converter and a generalized gradient descent algorithm to dynamically track the values of passive components, such as capacitors and inductors, in a power electronics converter. The algorithm is digitally implemented in real-time on the same embedded processor as the control system, and is used to monitor when passive component parameter values are above or below a predefined tolerance range, which would indicate a fault scenario. The design advantages of the proposed method compared to state-of-the-art is threefold. First, the modeling and identification algorithm is general in that it is applicable to any switching power converter which can be modeled as a switched linear system. Thus, although the focus of this work is on dc-dc converters for solar photovoltaic applications, the technique can also be applied in the context of motor drive applications, cable integrity monitoring, among others. Second, the real-time algorithm is implemented digitally, as opposed to techniques that require custom analog implementations for each converter or estimated parameter. Moreover, the algorithm has low computational overhead, which enables it to be implemented on the same computing platform as the control system. Third, the proposed approach requires no additional sensors or computing devices or injection of external signals into the system.

Architecture

Circuit topology of an interleaved boost dc-dc converter